TCE Special Guest Lecture: Revisiting Virtual Caches

דובר:
גורי סוהי (אונ' ויסקונסין)
תאריך:
יום רביעי, 29.3.2017, 11:30
מקום:
חדר 861, בניין מאייר, הפקולטה להנדסת חשמל

Virtual caches have been around for several decades. They have several advantages in performance and energy efficiency, but have not been used in ubiquitous commercial designs because of problems due to synonyms. To revisit the problem and come up with a practical design, we start with a study of the temporal behavior characteristics of synonyms in several benchmark programs. Exploiting these characteristics we propose a practical virtual cache design with dynamic synonym remapping (VC-DSR) and then evaluate the effectiveness in a CPU context. We also study the application and effectiveness of virtual caches in a GPU context. In this talk we will present the empirical observations than underlie the proposal for VC-DSR, present the design and its effectiveness in a general CPU context. We also present a design to use virtual caches (both L1 and L2) in an integrated GPU context and show how it can significantly reduce the overheads of address translation.

Bio
Guri Sohi has been a faculty member at the University of Wisconsin-Madison since 1985 where he currently a John P. Morgridge Professor and a Vilas Research Professor. Sohi's research has been in the design of high-performance microprocessors and computer systems. Results from his research can be found in almost every high-end microprocessor in the market today. He has received the 1999 ACM SIGARCH Maurice Wilkes award, the 2011 ACM/IEEE Eckert-Mauchly Award, and the 2016 IEEE B. Ramakrishna Rau Award. At the University of Wisconsin he was selected as a Vilas Associate in 1997, awarded a WARF Kellett Mid-Career Faculty Researcher award in 2000, a WARF Named Professor in 2007, and a Vilas Research Professor in 2015. He is a Fellow of both the ACM and the IEEE and is a member of the National Academy of Engineering

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