Haggai Eran (EE, Technion)
Wednesday, 26.1.2022, 11:30
The inline processing technique enables data transformation as a system transfers data to or from a processing node. It is used to offload computations and accelerate data-intensive communication tasks, reducing latency and power due to data movement and improving throughput by using the best processing core for the job. However, inline processing poses several challenges: it breaks existing operating system and network stack layers and makes it difficult to reuse previous software and hardware. This talk presents new operating system abstractions to allow application layer inline processing on SmartNICs and new SmartNIC designs, enabling fine-grain hardware virtualization and reusing existing ASIC NIC functionality with FPGA-based SmartNICs. In addition, I will present a complementary line of research that uses SmartNICs to accelerate data-center networks transparently and enable sharing of competing network transports.
*PhD student under supervision of Prof. Mark Silberstein.