אירועים והרצאות בפקולטה למדעי המחשב ע"ש הנרי ומרילין טאוב
Jongeun Lee (UNIST, Ulsan, Korea)
יום חמישי, 20.10.2022, 11:30
הרצאת זום: 9467301353
חדר 861, בניין מאייר, הפקולטה להנדסת חשמל
ReRAM (Resistive Random-Access Memory) crossbar arrays have the potential to provide extremely efficient matrix-vector multiplication (MVM) operations, which are the cornerstone of many DNN (Deep Neural Network) applications. However, there are several challenges in order for ReRAM crossbar arrays (RCAs) to be useful for accelerating large-scale DNN applications. In this talk we discuss two of those challenges. The first one is the distortion in the MVM output of RCAs due to nonidealities such as wire resistance (also known as IR drop) and I-V nonlinearity (i.e., voltage-dependent conductance). While it may be very difficult to completely eliminate RCA nonidealities, a fast method for system architects to accurately predict the output of RCAs under nonidealities would be highly desirable. We discuss recent methods in this direction and possible use cases. The second challenge is the high peripheral circuit overhead of RCAs. In particular, ADCs (Analog-Digital Converters) can account for a lion’s share in both area and power dissipation of RCAs. I will present a quantization-based method, which can reduce the ADC overhead of ReRAM crossbar arrays significantly (32x compared with ISAAC for ResNet on ImageNet dataset) at minimal accuracy loss (of 0.24% compared with the same).
Jongeun Lee received his B.Sc. and M.Sc. degrees in electrical engineering, and his Ph.D. in electrical engineering and computer science, all from Seoul National University, Korea. In 2009, he joined Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea, where he is now a Professor at the Department of Electrical Engineering. Prior to joining UNIST, he worked as a postdoctoral research associate at Arizona State University, Tempe, Arizona, USA, and for Samsung Electronics, Korea.
He has published more than 80 peer-reviewed journal and conference papers and has been on the technical program committees and organizing committees of several workshops and conferences in the areas of computer-aided design and reconfigurable computing. His research interests are in the general area of hardware/software co-design, and include reconfigurable architectures, deep learning, and computer-aided design for emerging technologies.