אירועים והרצאות בפקולטה למדעי המחשב ע"ש הנרי ומרילין טאוב

Computer systems that facilitate tight integration of data storage and processing can eliminate the "memory wall" and "power wall" bottlenecks. The memristive Memory Processing Unit (mMPU) architecture contains memory cells that can also execute logical functions, such as Memristor-Aided Logic (MAGIC) NOR gates. The mMPU supports both general-purpose computing and application-specific acceleration. This research contributes to both these aspects of the mMPU.

First, we introduce frameworks that automate the mapping of any desired logical function into the mMPU. These frameworks, called SIMPLE and SIMPLER, employ algorithms that optimize any arbitrary in-memory MAGIC operation sequences. Various performance criteria can be configured, including latency (SIMPLE), throughput (SIMPLER), chip area, and energy consumption. Both frameworks provide significant improvements over previous solutions.

Focusing on the specific application of DNA sequencing, we present an mMPU-based accelerator called DART-PIM. Unlike prior studies which suffer from data-transfer bottlenecks, DART-PIM integrates all stages on a single chip for maximal end-to-end performance. This is achieved through a unique data organization technique and a novel algorithmic flow tailored for in-memory implementation. DART-PIM achieves two orders of magnitude improvement in throughput and energy efficiency, compared to state-of-the-art existing architectures.

Rotem is a PhD student supervised by Prof. Shahar Kvatinsky.