אירועים והרצאות בפקולטה למדעי המחשב ע"ש הנרי ומרילין טאוב

Our industry has reaped the benefits of Moore's Law for 50 years now, making integrated circuits that have grown from tens to billions of transistors and performing an increased range of functions from memory to logic to signal processing. Scaled transistors have provided significant improvements in performance and low power, but the main benefit of scaling has been lower cost per transistor. As we scale to 10 nm and below it is becoming increasingly difficult to achieve traditional improvements in performance, power and cost due to inherent leakage and resistance increases of scaled devices, and the increased cost of added masking layers. Moore's Law will continue beyond 10 nm by developing new materials and device structures to meet performance and power requirements. The focus of future scaling will expand from traditional device scaling on single chips to scaling larger systems using multiple chips in dense 3-dimensional packages. To continue Moore's Law in the coming decades will require collaborative research between industry and academic institutions. Short Bio: Mark Bohr is an Intel Senior Fellow and Director of Process Architecture and Integration. He joined Intel in 1978 after graduating from the University of Illinois and is a member of the Logic Technology Development group located in Hillsboro, Oregon. Mark is currently directing early process development activities for Intel's 7 nm generation logic technology. He is an IEEE Fellow, recipient of the 2003 IEEE Andrew S. Grove Award, recipient of the 2012 IEEE Jun-ichi Nishizawa Medal, and a member of the U.S. National Academy of Engineering. He holds 77 patents in the area of integrated circuit processing and has authored or co-authored 50 published papers. Desserts will be served from 14:15Lecture starts at 14:30.