סדרת הרצאות במסגרת המרכז להנדסת מחשבים - TCE.- מפי אורח מיוחד ע"ש הנרי טאוב, פרופ' ייל פת מאוניברסיטת טקסס באוסטין תתקיים ביוני 2013 בפקולטה להנדסת חשמל בטכניון, בחדר 165 כדלהלן:

הרצאה מס' 1: יום ה', 13 ביוני, בשעה 14:30 (4 שעות)
הרצאה מס' 2: יום ו', 14 ביוני, בשעה 09:00 (3 שעות)
הרצאה מס' 3: יום ה', 20 ביוני, בשעה 14:30 (4 שעות)
הרצאה מס' 4: יום ו', 21 ביוני, בשעה 09:00 (3 שעות))

תקציר:
Using computers to solve problems requires starting with a natural language formulation of the problem and systematically transforming it until one has a machine language (ISA) specification of the problem (i.e., a program). This then is executed on the implementation hardware. As Moore's Law continues to provide more and more transistors on a chip (50 billion transistors in a few years), application specialists continue to think up more and more applications that require additional processing capability. The ISA is the interface between the software producing a program and the hardware carrying it out. The ISA is implemented by a microarchitecture that is constrained by trade-offs such as performance, power consumption, cost, reliability, availability, etc. In this course, we will examine some of the choices and tradeoffs.

פרטי הקורס:
הרצאה מס' 1:
A science of tradeoffs, transformation hierarchy, microarchitecture view. The algorithm, compiler, microarchitecture, physical view , tradeoffs in the ISA, microarchitecture and at the system level , speculation, the value of numbers.

הרצאה מס' 2:
Run-time (evolution of the microprocessor, branch prediction, trace cache, MT, SMT, SSMT, L2 miss activity), Compile-time (block-structured ISA, fast track/slow track, wish branches, braids and more).

הרצאה מס' 3:
Uniprocessor (SIMD, VLIW, DAE, HPS, Data Flow, Multiprocessor (tightly coupled vs loosely coupled), metrics (speedup, efficiency, redundancy, utilization), Amdahl's Law, interconnection structures, memory consistency, cache coherence.

הרצאה מס' 4:
Floating point arithmetic (because every so often the computer has to compute), retrospective on RISC (because it has been greatly misunderstood), future directions (Morphcore, breaking the layers, dark silicon), and remaining questions.

קורות חיים:
Yale N. Patt is Professor of ECE and the Ernest Cockrell, Jr. Centennial Chair in Engineering at The University of Texas at Austin. He continues to thrive on teaching both the large (400+ students) freshman introductory course in computing and advanced graduate courses in microarchitecture, advising PhD students, and consulting in the microprocessor industry. Some of his research ideas (e.g., HPS, the two-level branch predictor, ACMP) have ended up in the cutting-edge chips of Intel, AMD, etc. and some of his teaching ideas have resulted in his motivated bottom-up approach for introducing computing to serious students. The textbook for his breakaway approach, "Introduction to Computing Systems: from bits and gates to C and beyond," co-authored with Prof. Sanjay Patel of Illinois (McGraw-Hill, 2nd ed. 2004), has been adopted by more than 100 universities world-wide.

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